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Vol.E77-C No.5
pp.846-852
Special SectionPAPER
A 10-b 50 MS/s 500-mW A/D Converter Using a Differential-Voltage Subconverter
Takahiro MIKI, Hiroyuki KOUNO, Toshio KUMAMOTO, Yasushi KINOSHITA, Takayuki IGARASHI, Keisuke OKADA, |
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Vol.E77-C No.5
pp.853-858
Special SectionLETTER
A Self-Biased Feedback-Controlled Pull-Down Emitter Follower for High-Speed Low-Power Bipolar Logic Circuits
Hyun J. SHIN, |
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Summary | Full Text:PDF | |
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Vol.E77-C No.5
pp.859-863
Special SectionLETTER
16-Mb Synchronous DRAM with 125-Mbyte/s Data Rate
Yunho CHOI, Myungho KIM, Hyunsoon JANG, Taejin KIM, Seung-hoon LEE, Ho-cheol LEE，Churoo PARK, Siyeol LEE, Cheol-soo KIM, Sooin CHO, Ejaz HAQ, Joel KARP, Daeje CHIN, |
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Summary | Full Text:PDF | |
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Vol.E77-C No.5
pp.864-868
Special SectionLETTER
An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5-V DRAM's
Yasuhiko TSUKIKAWA, Takeshi KAJIMOTO, Yasuhiko OKASAKA, Yoshikazu MOROOKA, Kiyohiro FURUTANI, Hiroshi MIYAMOTO, Hideyuki OZAKI, |
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Vol.E77-C No.5
pp.869-872
Special SectionLETTER
Open/Folded Bit-Line Arrangement for Ultra-High-Density DRAM's
Daisaburo TAKASHIMA, Shigeyoshi WATANABE, Hiroaki NAKANO, Yukihito OOWAKI, Kazunori OHUCHI, |
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Summary | Full Text:PDF | |
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Vol.E77-D No.5
pp.539-545
PAPER
Automata, Languages and Theory of Computing
Asynchronous and Synchronous Parallel Derivation of Formal Languages
Katsuhiko NAKAMURA, |
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Vol.E77-D No.5
pp.546-554
PAPER
Algorithm and Computational Complexity
A Task Mapping Algorithm for Linear Array Processors
Tsuyoshi KAWAGUCHI, Yoshinori TAMURA, Kouichi UTSUMIYA, |
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Vol.E77-D No.5
pp.555-566
PAPER
Algorithm and Computational Complexity
A Metric between Unrooted and Unordered Trees and Its Top-down Computing Method
Tomokazu MUGURUMA, Eiichi TANAKA, Sumio MASUDA, |
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Vol.E77-D No.5
pp.567-573
PAPER
Computer Hardware and Design
On a Class of Multiple-Valued Logic Functions with Truncated Sum, Differential Product and Not Operations
Yutaka HATA, Kazuharu YAMATO, |
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Summary | Full Text:PDF | |
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Vol.E77-D No.5
pp.574-578
PAPER
Computer Systems
A Design and Implementation of an Ada IPC Interface
Masahiro NAKAMA, Zensho NAKAO, |
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