Warning: Undefined array key "lang" in /var/www/02search_html/bin/search_result.php on line 70

Warning: Undefined array key "input_data" in /var/www/02search_html/bin/search_result.php on line 199

Warning: Undefined array key "Begin_V" in /var/www/02search_html/bin/search_result.php on line 249
IEICE Trans
Search of Paper Information

Search Results

Total 44163 documents match your query. Current List: 38891 - 38900

Vol.E77-A No.12  pp.2010-2016
Special SectionPAPER  
A Reduced Scan Shift Method for Sequential Circuit Testing
Yoshinobu HIGAMI, Seiji KAJIHARA, Kozo KINOSHITA, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2017-2027
Special SectionPAPER  
Analysis of Pulse Responses of Multi-Conductor Transmission Lines by a Partitioning Technique
Yuichi TANJI, Lingge JIANG, Akio USHIDA, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2028-2038
Special SectionPAPER  
Maple: A Simultaneous Technology Mapping, Placement, and Global Routing Algorithm for Field-Programmable Gate Arrays
Nozomu TOGAWA, Masao SATO, Tatsuo OHTSUKI, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2039-2044
Special SectionPAPER  
A Graph Bisection Algorithm Based on Subgraph Migration
Kazunori ISOMOTO, Yoshiyasu MIMASA, Shin'ichi WAKABAYASHI, Tetsushi KOIDE, Noriyoshi YOSHIDA, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2045-2052
Special SectionPAPER  
A New Approach of Fractal-Analysis Based Module Clustering for VLSI Placement
Masahiko TOYONAGA, Shih-Tsung YANG, Isao SHIRAKAWA, Toshiro AKINO, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2053-2057
Special SectionLETTER  
A Floorplanning Method with Topological Constraint Manipulation in VLSI Building Block Layout
Tetsushi KOIDE, Yoshinori KATSURA, Katsumi YAMATANI, Shin'ichi WAKABAYASHI, Noriyoshi YOSHIDA, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2058-2066
Special SectionPAPER  
A Global Router Optimizing Timing and Area for High-Speed Bipolar LSIs
Ikuo HARADA, Yuichiro TAKEI, Hitoshi KITAZAWA, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2067-2075
Special SectionPAPER  
A Fast Vectorized Maze Routing Algorithm on a Supercomputer
Yoshio MIKI, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2076-2084
Special SectionPAPER  
A Modified Genetic Channel Router
Akio SAKAMOTO, Xingzhao LIU, Takashi SHIMAMOTO, 
Summary | Full Text:PDF

Vol.E77-A No.12  pp.2085-2091
Special SectionPAPER  
A Multi-Layer Channel Router Using Simulated Annealing
Masahiko TOYONAGA, Chie IWASAKI, Yoshiaki SAWADA, Toshiro AKINO, 
Summary | Full Text:PDF

Current List: 38891 - 38900
go to Page Top