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Vol.E78-C No.12
pp.1668-1681
INVITED PAPER
ULSI Realization of MPEG2 Realtime Video Encoder and Decoder--An Overview
Masahiko YOSHIMOTO, Shin-ichi NAKAGAWA, Tetsuya MATSUMURA, Kazuya ISHIHARA, Shin-ichi URAMOTO, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1682-1690
Special SectionPAPER
A Bidirectional Motion Compensation LSI with a Compact Motion Estimator
Naoya HAYASHI, Toshiaki KITSUKI, Ichiro TAMITANI, Hideki HONMA, Yasushi OOI, Takashi MIYAZAKI, Katsunari OOBUCHI, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1691-1696
Special SectionPAPER
A 600 mW Single Chip MPEG2 Video Decoder
Kiyoshi MIURA, Hideki KOYANAGI, Hiroshi SUMIHIRO, Seiichi EMOTO, Nozomu OZAKI, Toshiro ISHIKAWA, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1697-1708
Special SectionPAPER
An MPEG2 Video Decoder LSI with Hierarchical Control Mechanism
Shin-ichi URAMOTO, Akihiko TAKABATAKE, Takashi HASHIMOTO, Jun TAKEDA, Gen-ichi TANAKA, Tsuyoshi YAMADA, Yukio KODAMA, Atsushi MAEDA, Toshiaki SHIMADA, Shun-ichi SEKIGUCHI, Tokumichi MURAKAMI, Masahiko YOSHIMOTO, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1709-1716
Special SectionPAPER
A 16-bit Digital Signal Processor with Specially Arranged Multiply-Accumulator for Low Power Consumption
Katsuhiko UEDA, Toshio SUGIMURA, Toshihiro ISHIKAWA, Minoru OKAMOTO, Mikio SAKAKIHARA, Shinichi MARUI, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1717-1725
Special SectionPAPER
A Circuit Library for Low Power and High Speed Digital Signal Processor
Hiroshi TAKAHASHI, Shigeshi ABIKO, Shintaro MIZUSHIMA, Yuni OZAWA, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1726-1732
Special SectionPAPER
622 Mbps 8 mW CMOS Low-Voltage Interface Circuit
Takashi TOMITA, Koichi YOKOMIZO, Takao HIRAKOSO, Kazukiyo HAGA, Kuniharu HIROSE, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1733-1737
Special SectionPAPER
A Low-Power and High-Speed Impulse-Transmission CMOS Interface Circuit
Masafumi NOGAWA, Yusuke OHTOMO, Masayuki INO, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1738-1745
Special SectionPAPER
An ATM Chip Set for High Performance Computer Interfaces, Affording over 100 Mbps Sustained Throughput
Yasuharu TOMIMITSU, Satoru KAWANAGO, Hirotaka YAMANE, Hideki KOBUNAYA, Shoji OHGANE, Nobuyuki MIZUKOSHI, Hiroshi SUZUKI, |
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Summary | Full Text:PDF | |
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Vol.E78-C No.12
pp.1746-1753
Special SectionPAPER
3-Gb/s CMOS 1:4 MUX and DEMUX ICs
Sadayuki YASUDA, Yusuke OHTOMO, Masayuki INO, Yuichi KADO, Toshiaki TSUCHIYA, |
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Summary | Full Text:PDF | |
| Current List: 37991 - 38000
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