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Vol.E80-B No.7
pp.1098-1100
LETTER
Communication Networks and Services
Experimental Demonstrations of IP over ATM with Congestion Avoidance Flow Control: CEFLAR
Yoshio KAJIYAMA, Hideo TATSUNO, Nobuyuki TOKURA, |
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Vol.E80-B No.7
pp.1101-1103
LETTER
Signaling System and Communication Protocol
ARQ with Erasures Correction in the Frequency-Nonselective Fading Channel
Lev GOLDFELD, Vladimir LYANDRES, Dov WULICH, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.839-840
FOREWORD
FOREWORD
Fujio MASUOKA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.841-848
INVITED PAPER
Functionality Enhancement in Elemental Devices for Implementing Intelligence on Integrated Circuits
Tadahiro OHMI, Tadashi SHIBATA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.849-858
INVITED PAPER
Eliciting the Potential Functions of Single-Electron Circuits
Masamichi AKAZAWA, Yoshihito AMEMIYA, |
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Vol.E80-C No.7
pp.859-867
INVITED PAPER
A 3.2 GFLOPS Neural Network Accelerator
Shinji KOMORI, Yutaka ARIMA, Yoshikazu KONDO, Hirono TSUBOTA, Ken-ichi TANAKA, Kazuo KYUMA, |
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Vol.E80-C No.7
pp.868-874
INVITED PAPER
CAM-Based Highly-Parallel Image Processing Hardware
Takeshi OGURA, Mamoru NAKANISHI, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.875-880
Special SectionPAPER
Quantum Devices
Surface Tunnel Transistors with Multiple Interband Tunnel Junctions
Toshio BABA, Tetsuya UEMURA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.881-885
Special SectionPAPER
Quantum Devices
Proposal of a Schottky-Barrier SET Aiming at a Future Integrated Device
Minoru FUJISHIMA, Hironobu FUKUI, Shuhei AMAKAWA, Koichiro HOH, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.7
pp.886-892
Special SectionPAPER
Novel Structure Devices
SOI/CMOS Circuit Design for High-Speed Communication LSIs
Kimio UEDA, Yoshiki WADA, Takanori HIROTA, Shigenobu MAEDA, Koichiro MASHIKO, Hisanori HAMANO, |
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Summary | Full Text:PDF | |
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