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IEICE Trans

Keyword : scan-based side-channel attack

Synthesis and Enumeration of Generalized Shift Registers for Strongly Secure SR-Equivalents
Hideo FUJIWARA Katsuya FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2017/09/01
Vol. E100-D  No. 9 ; pp. 2232-2236
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, generalized feedback/feed-forward shift registers, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Realization of SR-Equivalents Using Generalized Shift Registers for Secure Scan Design
Hideo FUJIWARA Katsuya FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/08/01
Vol. E99-D  No. 8 ; pp. 2182-2185
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, generalized feedback/feed-forward shift registers, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Properties of Generalized Feedback Shift Registers for Secure Scan Design
Hideo FUJIWARA Katsuya FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/04/01
Vol. E99-D  No. 4 ; pp. 1255-1258
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, generalized feedback/feed-forward shift registers, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Strongly Secure Scan Design Using Generalized Feed Forward Shift Registers
Hideo FUJIWARA Katsuya FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/10/01
Vol. E98-D  No. 10 ; pp. 1852-1855
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, generalized feed-forward shift registers, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Generalized Feed Forward Shift Registers and Their Application to Secure Scan Design
Katsuya FUJIWARA Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/05/01
Vol. E96-D  No. 5 ; pp. 1125-1133
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, shift register equivalents, shift register quasi-equivalents, generalized feed-forward shift registers, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Differential Behavior Equivalent Classes of Shift Register Equivalents for Secure and Testable Scan Design
Katsuya FUJIWARA Hideo FUJIWARA Hideo TAMAMOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/07/01
Vol. E94-D  No. 7 ; pp. 1430-1439
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
design-for-testability, scan design, shift register equivalents, security, scan-based side-channel attack, 
 Summary | Full Text:PDF
Scan-Based Side-Channel Attack against RSA Cryptosystems Using Scan Signatures
Ryuta NARA Kei SATOH Masao YANAGISAWA Tatsuo OHTSUKI Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2481-2489
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
scan-based side-channel attack, scan path, testability, cryptosystem, RSA, security, 
 Summary | Full Text:PDF