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IEICE Trans

Keyword : functional TAM

Scheduling Power-Constrained Tests through the SoC Functional Bus
Fawnizu Azmadi HUSSIN Tomokazu YONEDA Alex ORAILOLU Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3 ; pp. 736-746
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: High-Level Testing
Keyword: 
functional bus, functional TAM, power-constrained, packet-based scheduling, system-on-chip testing, 
 Summary | Full Text:PDF