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IEICE Trans

Keyword : fault-model

Very Fast Fault Simulation for Voltage Stuck-at Faults in Analog/Digital Mixed Circuit
Shigeharu TESHIMA Naoya CHUJO Ryuta TERASHIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7 ; pp. 853-860
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
test, fault-simulation, mixed-signal circuit, fault-model, 
 Summary | Full Text:PDF