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IEICE Trans

Keyword : unified cache

4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words
Koh JOHGUCHI Hans Jurgen MATTAUSCH Tetsushi KOIDE Tetsuo HIRONAKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/11/01
Vol. E90-C  No. 11 ; pp. 2157-2160
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
multi-port memory, unified cache, SRAM, CMOS, 
 Summary | Full Text:PDF