Keyword : testability technology (design for testability)
A Design for Testability Technique for Low Power Delay Fault Testing James Chien-Mo LI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-CNo. 4 ;
pp. 621-628 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: testability technology (design for testability), delay fault testing, low power, ASIC,