Keyword : testability technology (design for testability)

A Design for Testability Technique for Low Power Delay Fault Testing
James Chien-Mo LI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4 ; pp. 621-628
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
testability technology (design for testability)delay fault testinglow powerASIC
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