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IEICE Trans

Keyword : successive approximation (SA) ADC

A Low-Power Mixed-Architecture ADC with Time-Interleaved Correlated Double Sampling Technique and Power-Efficient Back-End Stages
Jin-Fu LIN Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/01/01
Vol. E94-C  No. 1 ; pp. 89-101
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
analog-to-digital converter (ADC), data converter, correlated double sampling (CDS), time-interleaved, successive approximation (SA) ADC, 
 Summary | Full Text:PDF