Analog CMOS Implementation of Quantized Interconnection Neural Networks for Memorizing Limit Cycles Cheol-Young PARKKoji NAKAJIMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/06/25 Vol. E82-ANo. 6 ;
pp. 952-957 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98)) Category: Keyword: neural network, limit cycles, quantized interconnection, programmable synapse, pattern classifier,