Keyword : programmable synapse

Analog CMOS Implementation of Quantized Interconnection Neural Networks for Memorizing Limit Cycles
Cheol-Young PARK Koji NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/06/25
Vol. E82-A  No. 6 ; pp. 952-957
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1998 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC '98))
neural networklimit cyclesquantized interconnectionprogrammable synapsepattern classifier
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LSI Neural Chip of Pulse-Output Network with Programmable Synapse
Shigeo SATO Manabu YUMINE Takayuki YAMA Junichi MUROTA Koji NAKAJIMA Yasuji SAWADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/01/25
Vol. E78-C  No. 1 ; pp. 94-100
Type of Manuscript:  PAPER
Category: Integrated Electronics
neurochippulseanalogprogrammable synapse
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