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IEICE Trans

Keyword : memory interleaving

A Three-Dimensional Instrumentation VLSI Processor Based on a Concurrent Memory-Access Scheme
Seunghwan LEE Masanori HARIYAMA Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/11/25
Vol. E80-C  No. 11 ; pp. 1491-1498
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
3-D instrumentation, epipolar constraint, block matching algorithm, special-purpose VLSI processor, memory interleaving, 
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