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IEICE Trans

Keyword : column-parallel processing

Column-Parallel Vision Chip Architecture for High-Resolution Line-of-Sight Detection Including Saccade
Junichi AKITA Hiroaki TAKAGI Keisuke DOUMAE Akio KITAGAWA Masashi TODA Takeshi NAGASAKI Toshio KAWASHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10 ; pp. 1869-1875
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Image Sensor/Vision Chip
Keyword: 
line-of-sight (LoS), saccade, vision chip, column-parallel processing, 
 Summary | Full Text:PDF