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IEICE Trans

Keyword : VLSI designs

Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems
Youngjoo LEE Jaehwan JUNG In-Cheol PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/02/01
Vol. E99-C  No. 2 ; pp. 293-301
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
energy-efficient design, forward error-correction, NAND flash memory, VLSI designs, 
 Summary | Full Text:PDF