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IEICE Trans

Keyword : SIMD array

An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU
Ryota TAKASU Yoichi TOMIOKA Yutaro ISHIGAKI Ning LI Tsugimichi SHIBATA Mamoru NAKANISHI Hitoshi KITAZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/07/01
Vol. E97-C  No. 7 ; pp. 697-706
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Simulation Techniques and Their Applications for Electronics)
Category: 
Keyword: 
FDTD method, FPGA, parallel processing, SIMD array, 
 Summary | Full Text:PDF