An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU

Ryota TAKASU  Yoichi TOMIOKA  Yutaro ISHIGAKI  Ning LI  Tsugimichi SHIBATA  Mamoru NAKANISHI  Hitoshi KITAZAWA  

IEICE TRANSACTIONS on Electronics   Vol.E97-C   No.7   pp.697-706
Publication Date: 2014/07/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E97.C.697
Type of Manuscript: Special Section PAPER (Special Section on Recent Advances in Simulation Techniques and Their Applications for Electronics)
FDTD method,  FPGA,  parallel processing,  SIMD array,  

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Electromagnetic field analysis is a time-consuming process, and a method involving the use of an FPGA accelerator is one of the attractive ways to accelerate the analysis; the other method involve the use of CPU and GPU. In this paper, we propose an FPGA accelerator dedicated for a two-dimensional finite-difference time-domain (FDTD) method. This accelerator is based on a two-dimensional single instruction multiple data (SIMD) array architecture. Each processing element (PE) is composed of a six-stage pipeline that is optimized for the FDTD method. Moreover, driving signal generation and impedance termination are also implemented in the hardware. We demonstrate that our accelerator is 11 times faster than existing FPGA accelerators and 9 times faster than parallel computing on the NVIDIA Tesla C2075. As an application of the high-speed FDTD accelerator, the design optimization of a waveguide is shown.