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A New Inductor-Less IP2 Enhancement Technique for CMOS Multi-Standard Mixer
Mohammad B. VAHIDFAR Omid SHOAEI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C
No. 6 ;
pp. 1234-1240
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category:
Keyword:
mixer, CMOS, multi-band, multi-standard receiver, IIP2, reconfigurable, GSM, DCS, PCS, UMTS, IEEE802.11 b-g, | | | Summary | Full Text:PDF | |
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A CMOS Dual-Mode RF Front-End Receiver for GSM and WCDMA Applications
Chun-Lin KO Ming-Ching KUO Chien-Nan KUO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Vol. E88-C
No. 6 ;
pp. 1218-1224
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: RF
Keyword:
CMOS RF receiver, dual-mode, GSM, W-CDMA, | | | Summary | Full Text:PDF | |
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A Dual Band Planar Inverted-F Antenna with Non-uniform Meander-Line Shaped Slot
I-Fong CHEN | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 2004/06/01
Vol. E87-B
No. 6 ;
pp. 1767-1769
Type of Manuscript:
LETTER
Category: Antenna and Propagation
Keyword:
PIFA, non-uniform meander-line, GSM, DCS, | | | Summary | Full Text:PDF | |
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The Performance of Subjective Speech Quality and BER in a GSM-Based System
Yeon Ho CHUNG | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 1998/10/25
Vol. E81-B
No. 10 ;
pp. 1944-1945
Type of Manuscript:
LETTER
Category: Mobile Communication
Keyword:
GSM, speech quality, mean opinion score, BER, | | | Summary | Full Text:PDF | |
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A Circuit Library for Low Power and High Speed Digital Signal Processor
Hiroshi TAKAHASHI Shigeshi ABIKO Shintaro MIZUSHIMA Yuni OZAWA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1995/12/25
Vol. E78-C
No. 12 ;
pp. 1717-1725
Type of Manuscript:
Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia)
Category:
Keyword:
low power, high speed, low cost, GSM, PDC, NADC, digital signal processing, personal communication, 50 MIPS, CPU, | | | Summary | Full Text:PDF | |
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