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IEICE Trans

Keyword : parametric BSG

Recognition of Floorplan by Parametric BSG for Reuse of Layout Design
Keishi SAKANUSHI Zhonglin WU Yoji KAJITANI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4 ; pp. 872-879
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
parametric BSG, layout, reuse, floorplan, technology migration, 
 Summary | Full Text:PDF