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IEICE Trans

Keyword : non-rectangular transistor

Intra-Gate Length Biasing for Leakage Optimization in 45 nm Technology Node
Yesung KANG Youngmin KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/05/01
Vol. E96-A  No. 5 ; pp. 947-952
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
design for manufacturing (DFM), leakage saving, non-rectangular transistor, device model, TCAD, gate biasing, 
 Summary | Full Text:PDF