Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-ANo. 12 ;
pp. 2701-2707 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis Keyword: field programmable gate array (FPGA), LUT architecture, reconfigurable logic,
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2002/12/01 Vol. E85-BNo. 12 ;
pp. 2601-2609 Type of Manuscript: Special Section PAPER (Special Issue on Software Defined Radio Technology and Its Applications) Category: Keyword: download, security, field programmable gate array (FPGA), software defined radio (SDR),
A Routability Driven Technology Mapping Algorithm for LUT Based FPGA Designs Chi-Chou KAOYen-Tai LAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-ANo. 11 ;
pp. 2690-2696 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: FPGA Systhesis Keyword: technology mapping, routability, min-cut, field programmable gate array (FPGA),