Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/09/01 Vol. E96-DNo. 9 ;
pp. 1986-1993 Type of Manuscript: Special Section PAPER (Special Section on Dependable Computing) Category: Keyword: delay testing, time-to-digital converter, boundary scan, design for testability,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/03/01 Vol. E96-CNo. 3 ;
pp. 393-401 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: delay testing, BIST, analog filter, sample-hold circuit,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-CNo. 3 ;
pp. 349-355 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: Signal Integrity and Variability Keyword: delay testing, quality model, defect distribution,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12 ;
pp. 3208-3210 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Timing Verification and Test Generation Keyword: delay testing, path delay fault, path selection, untestable path,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/10/01 Vol. E85-DNo. 10 ;
pp. 1506-1514 Type of Manuscript: Special Section PAPER (Special Issue on Test and Verification of VLSI) Category: Test and Diagnosis for Timing Faults Keyword: delay testing, path selection, fault simulation, test generation, path-status graph,