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| Keyword : constraint graph
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Fujimaki-Takahashi Squeeze: Linear Time Construction of Constraint Graphs of Floorplan for a Given Permutation
Toshihiko TAKAHASHI Ryo FUJIMAKI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A
No. 4 ;
pp. 1071-1076
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
floorplan, representation, permutation, constraint graph, | | | Summary | Full Text:PDF | |
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Procedural Detailed Compaction for the Symbolic Layout Design of CMOS Leaf Cells
Hiroshi MIYASHITA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/11/25
Vol. E77-A
No. 11 ;
pp. 1957-1969
Type of Manuscript:
PAPER
Category: Computer Aided Design (CAD)
Keyword:
symbolic layout, compaction, design rule, leaf cell, constraint graph, | | | Summary | Full Text:PDF | |
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