Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A
No. 12 ;
pp. 2553-2560
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification Keyword: compressor tree, generalized parallel counter, integer linear programming, arithmetic synthesis, |