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IEICE Trans

Keyword : circuit optimization

Leveraging Different Boolean Function Decompositions to Reduce T-Count in LUT-Based Quantum Circuit Synthesis
David CLARINO Naoya ASADA Atsushi MATSUO Shigeru YAMASHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2025/04/01
Vol. E108-D  No. 4 ; pp. 320-329
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
relative-phase Toffoli gates (RTOF), circuit optimization, LUT, quantum circuit synthesis, 
 Summary | Full Text:PDF
Reducing T-Count in Quantum Circuits Using Alternate Forms of the Relative Phase Toffoli Gate
David CLARINO Shohei KURODA Shigeru YAMASHITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2025/01/01
Vol. E108-A  No. 1 ; pp. 1-10
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
relative-phase Toffoli gates (RTOF), S gate, circuit optimization, 
 Summary | Full Text:PDF
Compaction of Topological Quantum Circuits by Modularization
Kota ASAI Shigeru YAMASHITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/04/01
Vol. E102-A  No. 4 ; pp. 624-632
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
topological quantum computation, qubit layout, circuit optimization, simulated annealing, 
 Summary | Full Text:PDF
Circuit Design Optimization Using Genetic Algorithm with Parameterized Uniform Crossover
Zhiguo BAO Takahiro WATANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/01/01
Vol. E93-A  No. 1 ; pp. 281-290
Type of Manuscript:  PAPER
Category: Nonlinear Problems
Keyword: 
genetic algorithm, evolutionary algorithms, circuit optimization, evolutionary circuit design, evolvable hardware, 
 Summary | Full Text:PDF
Numerical Study of the Effect of Parasitic Inductance on RSFQ Circuits
Masaaki MAEZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/01/01
Vol. E84-C  No. 1 ; pp. 20-28
Type of Manuscript:  Special Section PAPER (Special Issue on Superconductive Electronics)
Category: Digital Applications
Keyword: 
Josephson junction, rapid single flux quantum, parasitic inductance, circuit optimization, 
 Summary | Full Text:PDF
Parameter Optimization of Single Flux Quantum Digital Circuits Based on Monte Carlo Yield Analysis
Nobuyuki YOSHIKAWA Kaoru YONEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/01/25
Vol. E83-C  No. 1 ; pp. 75-80
Type of Manuscript:  Special Section PAPER (Special Issue on Superconductive Devices and Systems)
Category: Digital Applications
Keyword: 
RSFQ logic circuits, single flux quantum, superconducting circuits, circuit optimization, center-of-gravity method, circuit yield, Monte Carlo yield analysis, 
 Summary | Full Text:PDF
Focused Ion Beam Trimming Techniques for MMIC Circuit Optimization
Takahide ISHIKAWA Makio KOMARU Kazuhiko ITOH Katsuya KOSAKI Yasuo MITSUI Mutsuyuki OTSUBO Shigeru MITSUI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/06/25
Vol. E76-C  No. 6 ; pp. 891-900
Type of Manuscript:  Special Section PAPER (Special Issue on Microwave and Millimeter-Wave Technology for Advanced Functions and Size-Reductions)
Category: 
Keyword: 
FIB (Focused Ion Beam), trimming, circuit optimization, MMIC, 
 Summary | Full Text:PDF