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IEICE Trans

Keyword : REC code

A Bit-Write-Reducing and Error-Correcting Code Generation Method by Clustering ECC Codewords for Non-Volatile Memories
Tatsuro KOJO Masashi TAWADA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12 ; pp. 2398-2411
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
non-volatile memory, bit-write-reducing, error-correcting codes, clustering conditions, S-bit flip conditions, S-bound graph, cluster graph, REC code, 
 Summary | Full Text:PDF