Keyword : error-correcting codes


A Modulus Factorization Algorithm for Self-Orthogonal and Self-Dual Integer Codes
Hajime MATSUI 
Publication:   
Publication Date: 2018/11/01
Vol. E101-A  No. 11 ; pp. 1952-1956
Type of Manuscript:  LETTER
Category: Coding Theory
Keyword: 
error-correcting codesself-orthogonal codesself-dual codescodes over integer residue ringsChinese remainder theorem
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A Relaxed Bit-Write-Reducing and Error-Correcting Code for Non-Volatile Memories
Tatsuro KOJO Masashi TAWADA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   
Publication Date: 2018/07/01
Vol. E101-A  No. 7 ; pp. 1045-1052
Type of Manuscript:  Special Section LETTER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
non-volatile memorybit-write-reducingerror-correcting codesclustering conditionsS-bit flip conditionsS-bound graphcluster graphrelaxed REC code
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A Bit-Write-Reducing and Error-Correcting Code Generation Method by Clustering ECC Codewords for Non-Volatile Memories
Tatsuro KOJO Masashi TAWADA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12 ; pp. 2398-2411
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
non-volatile memorybit-write-reducingerror-correcting codesclustering conditionsS-bit flip conditionsS-bound graphcluster graphREC code
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Decoding of Projective Reed-Muller Codes by Dividing a Projective Space into Affine Spaces
Norihiro NAKASHIMA Hajime MATSUI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/03/01
Vol. E99-A  No. 3 ; pp. 733-741
Type of Manuscript:  PAPER
Category: Coding Theory
Keyword: 
error-correcting codesaffine variety codesGröbner basisBerlekamp-Massey-Sakata algorithmdiscrete Fourier transform
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Code Generation Limiting Maximum and Minimum Hamming Distances for Non-Volatile Memories
Tatsuro KOJO Masashi TAWADA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12 ; pp. 2484-2493
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
non-volatile memorymaximum-writing bitserror-correcting codesDoughnut codecode expansion
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An Adaptive Reed-Solomon Decoder Using Separate Clocks in the Pipelined Steps
Moon-Kyou SONG Min-Han KONG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2005/02/01
Vol. E88-B  No. 2 ; pp. 615-622
Type of Manuscript:  PAPER
Category: Devices/Circuits for Communications
Keyword: 
adaptive forward error correctionerror-correcting codesmodified Euclid's algorithmReed-Solomon codes
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Near-Optimality of Subcodes of Hamming Codes on the Two-State Markovian Additive Channel
Mitsuru HAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/10/01
Vol. E84-A  No. 10 ; pp. 2383-2388
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Coding Theory
Keyword: 
error-correcting codeschannelsMarkov chaindecoding error probabilitynear-optimal codes
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Analysis of Aliasing Probability for MISRs by Using Complete Weight Distributions
Kazuhiko IWASAKI Sandeep K. GUPTA Prawat NAGVAJARA Tadao KASAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A  No. 12 ; pp. 1691-1698
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
BISTaliasing probabilityerror-correcting codescomplete weight distribution
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Soft-Decision Decoding Algorithm for Binary Linear Block Codes
Yong Geol SHIM Choong Woong LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/11/25
Vol. E76-A  No. 11 ; pp. 2016-2021
Type of Manuscript:  PAPER
Category: Information Theory and Coding Theory
Keyword: 
soft-decision decodingblock codeserror-correcting codes
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Theory and Techniques for Testing Check Bits of RAMs with On-Chip ECC
Manoj FRANKLIN Kewal K. SALUJA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/10/25
Vol. E76-D  No. 10 ; pp. 1243-1252
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
error-correcting codeson-chip ECCpattern sensitive faultsRAM testingtest algorithms
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An Error-Controlling Scheme Based on Different Importance of Segments of a Natural Language
Taroh SASAKI Ryuji KOHNO Hideki IMAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/09/25
Vol. E75-A  No. 9 ; pp. 1076-1086
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: 
Keyword: 
intelligent communicationerror-correcting codesnatural language
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