Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 56

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 212

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 304

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 323
IEICE Trans

Yoshihiro UCHIDA


Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays
Sadahiro TANI Yoshihiro UCHIDA Makoto FURUIE Shuji TSUKIYAMA BuYeol LEE Shuji NISHI Yasushi KUBOTA Isao SHIRAKAWA Shigeki IMAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 2923-2932
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Parasitics and Noise
Keyword: 
interconnectLCDparasitic capacitancesignal integritycircuit simulation
 Summary | Full Text:PDF