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IEICE Trans

Yasumasa TSUKAMOTO

An Analysis of Local BTI Variation with Ring-Oscillator in Advanced Processes and Its Impact on Logic Circuit and SRAM
Mitsuhiko IGARASHI Yuuki UCHIDA Yoshio TAKAZAWA Makoto YABUUCHI Yasumasa TSUKAMOTO Koji SHIBUTANI Kazutoshi KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2021/11/01
Vol. E104-A  No. 11  pp. 1536-1545
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Systems)
Category: 
Keyword: 
local BTI variation, Ring-Oscillator, 7nm FinFET, SRAM Vmin, 
 Summary | Full Text:PDF
Realistic Scaling Scenario for Sub-100 nm Embedded SRAM Based on 3-Dimensional Interconnect Simulation
Yasumasa TSUKAMOTO Tatsuya KUNIKIYO Koji NII Hiroshi MAKINO Shuhei IWADE Kiyoshi ISHIKAWA Yasuo INOUE Norihiko KOTANI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 439-446
Type of Manuscript:  Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
Category: 
Keyword: 
embedded SRAM, scaling merit, 3-dimensional interconnect simulation, 50 and 70 nm technology nodes, 
 Summary | Full Text:PDF