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IEICE Trans

Wataru SAITO

High Accuracy Test Techniques with Fine Pattern Generator and Ramp Test Circuit for CMOS Image Sensor Fukashi MORISHITA Wataru SAITO Norihito KATO Yoichi IIZUKA Masao ITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2022/07/01 Vol. E105-C No. 7 pp. 316-323 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology) Category: Keyword: CMOS image sensor, column-parallel ADC, ramp generator, multi-functional fine pattern generator, IP test,
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Modeling of Field-Plate Effect on Gallium-Nitride-Based High Electron Mobility Transistors for High-Power Applications Takeshi MIZOGUCHI Toshiyuki NAKA Yuta TANIMOTO Yasuhiro OKADA Wataru SAITO Mitiko MIURA-MATTAUSCH Hans Jürgen MATTAUSCH
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2017/03/01 Vol. E100-C No. 3 pp. 321-328 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: power, GaN-HEMTs, HiSIM, field plate, capacitance,
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PDLC Rewritable Medium Keiko SEKINE Wataru SAITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/05/01 Vol. E85-C No. 5 pp. 1151-1155 Type of Manuscript: PAPER Category: Optoelectronics Keyword: rewritable medium, polymer-dispersed liquid-crystal, smectic A liquid crystal, dichroic dye,
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Analysis of Structure Dependence of Very Short Channel Field Effect Transistor Using Vertical Tunneling with Heterostructures on Silicon Wataru SAITOH Katsuyuki YAMAZAKI Masafumi TSUTSUI Masahiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/12/25 Vol. E81-C No. 12 pp. 1918-1925 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: tunneling field effect transistor, heterostructure on Si, CoSi₂/Si/CdF₂/CaF₂, short channel device,
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