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IEICE Trans

Vincent C. GAUDET

Asynchronous Stochastic Decoding of LDPC Codes: Algorithm and Simulation Model
Naoya ONIZAWA Warren J. GROSS Takahiro HANYU Vincent C. GAUDET 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9  pp. 2286-2295
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: VLSI Architecture
Keyword: 
forward error correction (FEC), stochastic computation, asynchronous circuits, 
 Summary | Full Text:PDF
High-Throughput Bit-Serial LDPC Decoder LSI Based on Multiple-Valued Asynchronous Interleaving
Naoya ONIZAWA Takahiro HANYU Vincent C. GAUDET 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/06/01
Vol. E92-C  No. 6  pp. 867-874
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
error control coding, LDPC codes, sum-product algorithm, asynchronous data transfer, multiple-valued current-mode circuit, 
 Summary | Full Text:PDF