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IEICE Trans

Tadamichi SAKASHITA

A Synchronous DRAM with New High-Speed I/O Lines Method for the MultiMedia Age
Yuji SAKAI Kanji OISHI Miki MATSUMOTO Shoji WADA Tadamichi SAKASHITA Masahiro KATAYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C  No. 7  pp. 782-788
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)
Category: 
Keyword: 
DRAM, synchronous operation, memory, 
 Summary | Full Text:PDF