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| Shinichi NISHIZAWA
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Standard Cell Structure and Diffusion Reordering for Block Area Reduction in Double Diffusion Break FinFET Process
Shinichi NISHIZAWA Shinji KIMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2025/06/01
Vol. E108-A
No. 6
pp. 798-805
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD
Keyword:
standard cell, FinFET, double diffusion break, | | | Summary | Full Text:PDF | |
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Libretto: An Open Cell Timing Characterizer for Open Source VLSI Design
Shinichi NISHIZAWA Toru NAKURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2023/03/01
Vol. E106-A
No. 3
pp. 551-559
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
open source VLSI design, timing library, characterizer, | | | Summary | Full Text:PDF | |
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Minimization of Vote Operations for Soft Error Detection in DMR Design with Error Correction by Operation Re-Execution
Kazuhito ITO Yuto ISHIHARA Shinichi NISHIZAWA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2018/12/01
Vol. E101-A
No. 12
pp. 2271-2279
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
soft error, error detection, DMR, checkpoint, scheduling, | | | Summary | Full Text:PDF | |
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Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis
Shinichi NISHIZAWA Hidetoshi ONODERA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2018/12/01
Vol. E101-A
No. 12
pp. 2222-2230
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
D-Flip-Flop, variation aware design, regression analysis, | | | Summary | Full Text:PDF | |
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