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IEICE Trans

Seung-Jun BAE

A Decision Feedback Equalizing Receiver for the SSTL SDRAM Interface with Clock-Data Skew Compensation
Young-Soo SOHN Seung-Jun BAE Hong-June PARK Soo-In CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/05/01
Vol. E87-C  No. 5  pp. 809-817
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
SDRAM I/O interface, receiver equalization, SSTL, decision feedback equalization, clock-data skew compensation, X2 over-sampling phase detector, 
 Summary | Full Text:PDF
A Compact Radix-64 54 54 CMOS Redundant Binary Parallel Multiplier
Sang-Hoon LEE Seung-Jun BAE Hong-June PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/06/01
Vol. E85-C  No. 6  pp. 1342-1350
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
parallel multiplier, redundant binary, radix-64, CMOS circuit, digital circuit, 
 Summary | Full Text:PDF