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IEICE Trans

Sanroku TSUKAMOTO

Advances in Analog-to-Digital Converters over the Last Decade
Sanroku TSUKAMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2017/02/01
Vol. E100-A  No. 2  pp. 524-533
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
ADC, analog, amplifier, sampler, 
 Summary | Full Text:PDF
A 7-bit 1-GS/s Flash ADC with Background Calibration
Sanroku TSUKAMOTO Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 298-307
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
background calibration, ADC, offset cancel, interpolation, 
 Summary | Full Text:PDF
A 9-bit 100 MS/s SAR ADC with Digitally Assisted Background Calibration
Xiaolei ZHU Yanfei CHEN Sanroku TSUKAMOTO Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 1026-1034
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
ADC, successive approximation, split capacitor DAC, charge redistribution, nonlinearity, digital background calibration, 
 Summary | Full Text:PDF
A Dynamic Offset Control Technique for Comparator Design in Scaled CMOS Technology
Xiaolei ZHU Yanfei CHEN Masaya KIBUNE Yasumoto TOMITA Takayuki HAMADA Hirotaka TAMURA Sanroku TSUKAMOTO Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2456-2462
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
comparator, A/D converter, offset control, CMOS, 
 Summary | Full Text:PDF
A 9-bit 100-MS/s 1.46-mW Tri-Level SAR ADC in 65 nm CMOS
Yanfei CHEN Sanroku TSUKAMOTO Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2600-2608
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
ADC, successive approximation, charge redistribution, calibration, low power, 
 Summary | Full Text:PDF
Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC
Yanfei CHEN Xiaolei ZHU Hirotaka TAMURA Masaya KIBUNE Yasumoto TOMITA Takayuki HAMADA Masato YOSHIOKA Kiyoshi ISHIKAWA Takeshi TAKAYAMA Junji OGAWA Sanroku TSUKAMOTO Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 295-302
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
ADC, successive approximation, split capacitor DAC, comparator, calibration, 
 Summary | Full Text:PDF