Kiyoshi ISHIKAWA


Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC
Yanfei CHEN Xiaolei ZHU Hirotaka TAMURA Masaya KIBUNE Yasumoto TOMITA Takayuki HAMADA Masato YOSHIOKA Kiyoshi ISHIKAWA Takeshi TAKAYAMA Junji OGAWA Sanroku TSUKAMOTO Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 295-302
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
ADCsuccessive approximationsplit capacitor DACcomparatorcalibration
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A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model
Shinya KAJIYAMA Ken'ichiro SONODA Kazuo OTSUGA Hideaki KURATA Kiyoshi ISHIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 526-533
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
flash memoryAG-ANDmodelingconstant-charge-injection programminglucky electron model
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A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures
Toshiki KANAMOTO Tetsuya WATANABE Mitsutoshi SHIROTA Masayuki TERAI Tatsuya KUNIKIYO Kiyoshi ISHIKAWA Yoshihide AJIOKA Yasutaka HORIBA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3463-3470
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword: 
SoCinterconnectphysical parameterlow-kcapacitanceresistancelayout parasitic extraction
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Realistic Scaling Scenario for Sub-100 nm Embedded SRAM Based on 3-Dimensional Interconnect Simulation
Yasumasa TSUKAMOTO Tatsuya KUNIKIYO Koji NII Hiroshi MAKINO Shuhei IWADE Kiyoshi ISHIKAWA Yasuo INOUE Norihiko KOTANI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 439-446
Type of Manuscript:  Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
Category: 
Keyword: 
embedded SRAMscaling merit3-dimensional interconnect simulation50 and 70 nm technology nodes
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Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits
Ken-ichiro SONODA Motoaki TANIZAWA Kiyoshi ISHIKAWA Norihiko KOTANI Tadashi NISHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/08/25
Vol. E83-C  No. 8  pp. 1317-1323
Type of Manuscript:  Special Section PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Circuit Applications
Keyword: 
electrostatic dischargeelectrothermal simulationcircuit simulation
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2-Dimensional Simulation of FN Current Suppression Including Phonon Assisted Tunneling Model in Silicon Dioxide
Katsumi EIKYU Kiyohiko SAKAKIBARA Kiyoshi ISHIKAWA Tadashi NISHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6  pp. 889-893
Type of Manuscript:  Special Section PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
neutral trapphonon assisted tunnelingFN currentendurance characteristic
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3-D Topography and Impurity Integrated Process Simulator (3-D MIPS) and Its Applications
Masato FUJINAGO Tatsuya KUNIKIYO Tetsuya UCHIDA Eiji TSUKUDA Kenichiro SONODA Katsumi EIKYU Kiyoshi ISHIKAWA Tadashi NISHIMURA Satoru KAWAZU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6  pp. 848-861
Type of Manuscript:  Special Section PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
LSI fabricationprocess simulatortopographyimpurity diffusionsegregationcapacitance
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Two-Dimensional Device Simulation of 0.1 µm Thin-Film SOI MOSFET's
Hans-Oliver JOACHIM Yasuo YAMAGUCHI Kiyoshi ISHIKAWA Norihiko KOTANI Tadashi NISHIMURA Katsuhiro TSUKAMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/12/25
Vol. E75-C  No. 12  pp. 1498-1505
Type of Manuscript:  Special Section PAPER (Special Issue on SOI (Si on Insulator) Devices)
Category: Deep Sub-micron SOI CMOS
Keyword: 
thin-film SOI MOSFET'sminiaturized devicesdevice simulation
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