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IEICE Trans

Pao-Ann HSIUNG

DESC: A Hardware-Software Codesign Methodology for Distributed Embedded Systems Trong-Yen LEE Pao-Ann HSIUNG Sao-Jie CHEN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2001/03/01 Vol. E84-D No. 3 pp. 326-339 Type of Manuscript: PAPER Category: VLSI Systems Keyword: distributed embedded systems, emulation, two-level partitioning, object-oriented codesign, software scheduling,
	Summary \| Full Text:PDF

Hardware-Software Multi-Level Partitioning for Distributed Embedded Multiprocessor Systems Trong-Yen LEE Pao-Ann HSIUNG Sao-Jie CHEN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/02/01 Vol. E84-A No. 2 pp. 614-626 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: distributed embedded multiprocessor system, multi-level partitioning, codesign, clustering, sharing,
	Summary \| Full Text:PDF

Hardware-Software Timing Coverification of Distributed Embedded Systems Jih-Ming FU Trong-Yen LEE Pao-Ann HSIUNG Sao-Jie CHEN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2000/09/25 Vol. E83-D No. 9 pp. 1731-1740 Type of Manuscript: PAPER Category: VLSI Systems Keyword: hardware-software codesign, distributed embedded systems, linear hybrid automata, coverification, hard deadline,
	Summary \| Full Text:PDF

MOBnet: An Extended Petri Net Model for the Concurrent Object-Oriented System-Level Synthesis of Multiprocessor Systems Pao-Ann HSIUNG Trong-Yen LEE Sao-Jie CHEN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1997/02/25 Vol. E80-D No. 2 pp. 232-242 Type of Manuscript: PAPER Category: Computer Hardware and Design Keyword: concurrent object-oriented system-level synthesis, concurrent synthesis modeling, high-level Petri nets, disign completion check, synthesis rollback,
	Summary \| Full Text:PDF