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| Nobuaki KOBAYASHI
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Single-Power-Supply Six-Transistor CMOS SRAM Enabling Low-Voltage Writing, Low-Voltage Reading, and Low Standby Power Consumption
Tadayoshi ENOMOTO Nobuaki KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2023/09/01
Vol. E106-C
No. 9
pp. 466-476
Type of Manuscript:
PAPER
Category: Electronic Circuits
Keyword:
complementary metal-oxide-semiconductor (CMOS), static random-access memory (SRAM), write margin, read margin, standby power consumption, leakage current, minimum supply voltage, area overhead, self-controllable voltage level circuit, single power source, | | | Summary | Full Text:PDF | |
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A Low Power Multimedia Processor Implementing Dynamic Voltage and Frequency Scaling Technique and Fast Motion Estimation Algorithm Called “Adaptively Assigned Breaking-Off Condition (A2BC)”
Tadayoshi ENOMOTO Nobuaki KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C
No. 4
pp. 424-432
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
multimedia, H.264/AVC, motion estimation, DVFS, power dissipation, DC/DC level converter, | | | Summary | Full Text:PDF | |
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A Large “Read” and “Write” Margins, Low Leakage Power, Six-Transistor 90-nm CMOS SRAM
Tadayoshi ENOMOTO Nobuaki KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C
No. 4
pp. 530-538
Type of Manuscript:
Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category:
Keyword:
SRAM, leakage power, “write” margin, “read” margin, | | | Summary | Full Text:PDF | |
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Low-Dynamic-Power and Low-Leakage-Power Techniques for CMOS Square-Root Circuit
Tadayoshi ENOMOTO Nobuaki KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C
No. 4
pp. 409-416
Type of Manuscript:
Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category:
Keyword:
clocks, CMOS digital circuits, power consumption, SPICE, | | | Summary | Full Text:PDF | |
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