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IEICE Trans

Mitsuru HIRAKI

Random Modulation: Multi-Threshold-Voltage Design Methodology in Sub-2-V Power Supply CMOS
Naoki KATO Yohei AKITA Mitsuru HIRAKI Takeo YAMASHITA Teruhisa SHIMIZU Fuyuhiko MAKI Kazuo YANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Vol. E83-C  No. 11  pp. 1747-1754
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
CMOS, threshold voltage, leakage current, low power, 
 Summary | Full Text:PDF
Data-Dependent Logic Swing Internal Bus Architecture for Ultralow-Power LSI's
Mitsuru HIRAKI Hirotsugu KOIJIMA Hitoshi MISAWA Takashi AKAZAWA Yuji HATANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/06/25
Vol. E78-C  No. 6  pp. 645-650
Type of Manuscript:  Special Section PAPER (Special Issue on the 1994 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol. 30, No. 4 April 1995))
Category: 
Keyword: 
 Summary | Full Text:PDF
Coplanar Silicon-Coupled Josephson Junctions with Recessed Electrode Structure
Mitsuru HIRAKI Takuo SUGANO 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1987/04/25
Vol. E70-E  No. 4  pp. 389-391
Type of Manuscript:  LETTER
Category: Other Devices
Keyword: 
 Summary | Full Text:PDF