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IEICE Trans

Liang-Ying LU

Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
Tsung-Yi WU Liang-Ying LU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 401-408
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
dual value logic, leakage current, pass-transistor logic gate, standard cell, transmission gate, 
 Summary | Full Text:PDF