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IEICE Trans

Kiyoshi MITANI


Contribution of Polished Surface Waviness to Final SOI Thickness Uniformity of Bonded Wafers through PACE Process
Kiyoshi MITANI Masatake NAKANO Takao ABE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 370-377
Type of Manuscript:  INVITED PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: Wafer Technologies
Keyword: 
surface wavinessPACESOI thickness uniformitypolishingPSD
 Summary | Full Text:PDF

C-V Measurement and Simulation of Silicon-Insulator-Silicon (SIS) Structures for Analyzing Charges in Buried Oxides of Bonded SOI Materials
Kiyoshi MITANI Hisham Z. MASSOUD 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/12/25
Vol. E75-C  No. 12  pp. 1421-1429
Type of Manuscript:  Special Section PAPER (Special Issue on SOI (Si on Insulator) Devices)
Category: SOI Wafers
Keyword: 
silicon-insulator-silicon (SIS) structureC-V simulationnegative chargecharge distributionbonding seamwafer bonding
 Summary | Full Text:PDF