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Kei MATSUMOTO

Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit Kei MATSUMOTO Tetsuya HIROSE Yuji OSAKI Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/06/01 Vol. E94-C No. 6 pp. 1042-1048 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: SRAM, threshold voltage variation, compensation circuit, process variation, temperature variation, PVT variation,
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Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique Yuji OSAKI Tetsuya HIROSE Kei MATSUMOTO Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/01/01 Vol. E94-C No. 1 pp. 80-88 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: subthreshold operation, digital circuits, PVT variation, delay compensation,
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