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IEICE Trans

Kazuya SHIMIZU

Reduction of the Target Fault List and Fault Simulation Method for Crosstalk Faults in Clock-Delayed Domino Circuits
Kazuya SHIMIZU Takanori SHIRAI Masaya TAKAMURA Noriyoshi ITAZAKI Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10  pp. 1526-1533
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Test and Diagnosis for Timing Faults
Keyword: 
domino circuit, crosstalk fault, target fault reduction, fault simulation, 
 Summary | Full Text:PDF
An Improved Reflection Wave Method for Measurement of Complex Permittivity at 100 MHz-1GHz
Akira NAKAYAMA Kazuya SHIMIZU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/04/25
Vol. E77-C  No. 4  pp. 633-638
Type of Manuscript:  PAPER
Category: Microwave and Millimeter Wave Technology
Keyword: 
measurement of complex permittivity, reflection wave method, MHz-GHz range, frequency dependence, 
 Summary | Full Text:PDF