IEICE Trans

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IEICE Trans

Kazuo TERADA

Study on Threshold Voltage Variation Evaluated by Charge-Based Capacitance Measurement Katsuhiro TSUJI Kazuo TERADA Ryo TAKEDA Hisato FUJISAKA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2016/04/01 Vol. E99-C No. 4 pp. 466-473 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: MOSFET, C-V curve, CBCM, threshold voltage, flat-band voltage, variation,
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Development of Test Structure for Variability Evaluation using Charge-Based Capacitance Measurement Katsuhiro TSUJI Kazuo TERADA Ryota KIKUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/11/01 Vol. E97-C No. 11 pp. 1117-1123 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: MOSFET, C-V curve, CBCM, variability,
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Implementation of the Multicolored SOR Method on a Vector Supercomputer Seiji FUJINO Ryutaro HIMENO Akira KOJIMA Kazuo TERADA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1997/04/25 Vol. E80-D No. 4 pp. 518-523 Type of Manuscript: Special Section PAPER (Special Issue on Parallel and Distributed Supercomputing) Category: Keyword: multicolor, SOR method, PDE, vector length, stencil,
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A Capacitor over Bit-Line (COB) Stacked Capacitor Cell Using Local Interconnect Layer for 64 MbDRAMs Naoki KASAI Masato SAKAO Toshiyuki ISHIJIMA Eiji IKAWA Hirohito WATANABE Toshio TAKESHIMA Nobuhiro TANABE Kazuo TERADA Takamaro KIKKAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/04/25 Vol. E76-C No. 4 pp. 548-555 Type of Manuscript: Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies) Category: Device Technology Keyword: DRAM, memory cell, stacked capacitor, local interconnect,
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Double Boron-Ion Implanted Short Channel MOS FET for High Speed Static RAMs Kazuo TERADA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1980/08/25 Vol. E63-E No. 8 pp. 567-573 Type of Manuscript: PAPER Category: Semiconductors Keyword:
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