IEICE Trans

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IEICE Trans

Kazuhiko SAGARA

Evaluation of a 2-Channel NIRS-Based Optical Brain Switch for Motor Disabilities' Communication Tools Kazuhiko SAGARA Kunihiko KIDO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/03/01 Vol. E95-D No. 3 pp. 829-834 Type of Manuscript: PAPER Category: Rehabilitation Engineering and Assistive Technology Keyword: brain-computer interface (BCI), brain switch, near-infrared spectroscopy (NIRS),
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FOREWORD Kazuhiko SAGARA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2008/07/01 Vol. E91-B No. 7 pp. 2101-2101 Type of Manuscript: FOREWORD Category: Keyword:
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GO-STOP Control Using Optical Brain-Computer Interface during Calculation Task Kei UTSUGI Akiko OBATA Hiroki SATO Ryuta AOKI Atsushi MAKI Hideaki KOIZUMI Kazuhiko SAGARA Hiroaki KAWAMICHI Hirokazu ATSUMORI Takusige KATURA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2008/07/01 Vol. E91-B No. 7 pp. 2133-2141 Type of Manuscript: Special Section PAPER (Special Section on Brain Communication) Category: Keyword: NIRS, optical topography, brain-computer interface, brain switch, prefrontal cortex,
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A Distributed Authentication Platform Architecture for Peer-to-Peer Applications Kazuhiko SAGARA Kenya NISHIKI Minoru KOIZUMI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2005/03/01 Vol. E88-B No. 3 pp. 865-872 Type of Manuscript: Special Section PAPER (Special Section on Ubiquitous Networks) Category: Software Platform Technologies Keyword: authentication, peer-to-peer application, secure-path setup,
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Recessed Memory Array Technology for a Double Cylindrical Stacked Capacitor Cell of 256M DRAM Kazuhiko SAGARA Tokuo KURE Shoji SHUKURI Jiro YAGAMI Norio HASEGAWA Hidekazu GOTO Hisaomi YAMASHITA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/11/25 Vol. E75-C No. 11 pp. 1313-1322 Type of Manuscript: Special Section PAPER (Special Issue on LSI Memories) Category: Keyword: recessed memory array, stacked capacitor cell, 256 MDRAM,
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Deep-Submicrometer BiCMOS Circuit Technology for Sub-10-ns ECL 4-Mb DRAM's Takayuki KAWAHARA Yoshiki KAWAJIRI Goro KITSUKAWA Kazuhiko SAGARA Yoshifumi KAWAMOTO Takesada AKIBA Shisei KATO Yasushi KAWASE Kiyoo ITOH
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/04/25 Vol. E75-C No. 4 pp. 487-494 Type of Manuscript: Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium) Category: Keyword:
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