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IEICE Trans

Kayrollah HADIDI

A 500 MS/s 600 µW 300 µm2 Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS Process
Sarang KAZEMINIA Morteza MOUSAZADEH Kayrollah HADIDI Abdollah KHOEI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 635-640
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
CMOS comparator, flash ADCs, kickback noise, high speed ADCs, 
 Summary | Full Text:PDF