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IEICE Trans

Hyunui LEE

A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier
Hyunui LEE Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2508-2515
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword: 
analog-to-digital converter, interpolated pipeline topology, amplifier, body voltage control technique, 
 Summary | Full Text:PDF
Design of Interpolated Pipeline ADC Using Low-Gain Open-Loop Amplifiers
Hyunui LEE Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6  pp. 838-849
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
analog-to-digital converter, pipeline topology, interpolation, ADC performance optimization, 
 Summary | Full Text:PDF
A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation
Hyunui LEE Yusuke ASADA Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/02/01
Vol. E96-A  No. 2  pp. 422-433
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog-to-digital converter (ADC), Capacitor DAC (CDAC), gate-weighted interpolation, digital offset calibration, 
 Summary | Full Text:PDF