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IEICE Trans

Hisato OYAMATSU

Design Methodology of Deep Submicron CMOS Devices for 1 V Operation
Hisato OYAMATSU Masaaki KINUGAWA Masakazu KAKUMU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/12/25
Vol. E79-C  No. 12  pp. 1720-1725
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power LSI Technologies)
Category: 
Keyword: 
low voltage, low power dissipation, threshold voltage, CMOS, 
 Summary | Full Text:PDF