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IEICE Trans

Fuyuhiko MAKI

Random Modulation: Multi-Threshold-Voltage Design Methodology in Sub-2-V Power Supply CMOS
Naoki KATO Yohei AKITA Mitsuru HIRAKI Takeo YAMASHITA Teruhisa SHIMIZU Fuyuhiko MAKI Kazuo YANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/25
Vol. E83-C  No. 11  pp. 1747-1754
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
CMOS, threshold voltage, leakage current, low power, 
 Summary | Full Text:PDF